FIELD: computer engineering.
SUBSTANCE: invention relates to computer engineering and can be used to process and transmit data packets. Device comprises a routing module comprising at least four port processors (0-1, 0-2, 0-3, 0-4), configured to be connected to an interconnect bus, and four port processors (1-1, 1-2, 1-3, 1-4), configured to connect to an external communication network; a switching module comprising a switching processor configured to control packet switching; packet data processing module with a non-blocking switching matrix based on a reprogrammable logic integrated circuit (PLIC), comprising a filtering and addressing unit, wherein the interunit bus is configured to be connected to a processor module of the VoIP gateway unit and to a processor module of the unit of asynchronous interfaces RS-232 and RS-485.
EFFECT: reducing redundancy with simultaneous provision of compression when transmitting traffic via VoIP technology for transmitting traditional E1 channels and analogue interface services FXS, FXO, E&M.
8 cl, 3 dwg
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Authors
Dates
2025-01-17—Published
2023-12-29—Filed