METHOD OF REJECTING POTENTIALLY UNRELIABLE DIGITAL INTEGRATED CIRCUITS BY SIGNAL PROPAGATION DELAY TIME Russian patent published in 2025 - IPC G01R31/303 

FIELD: microelectronics.

SUBSTANCE: invention relates to microelectronics and specifically to methods of rejecting potentially unreliable digital integrated circuits (DIC) by signal propagation delay both in the process of their manufacture and in the manufacture of radioelectronic equipment. Signal propagation delay time is measured at the DIC batch on all IC inputs. First criterion for rejection of potentially unreliable ICs is established by the absolute value of the signal propagation delay, which does not exceed the specified value, at supply voltage close to the critical value. Signal propagation delay time is measured at the same circuits and inputs at rated supply voltage. Constructing a table, where for each DIC the minimum value of the signal propagation delay time when one of the inputs is switched off is taken as a unit, and the other inputs are used to record coefficient Ki, which is equal to the ratio of the value of the signal propagation delay time along this input to the value of the minimum delay time value, taken as a unit. Second criterion for rejection is selected based on the value of the coefficient Ki, which does not exceed the specified value. Those DIC, in which two criteria coincide, are considered to be potentially unreliable.

EFFECT: high reliability of rejection results for potentially unreliable ICs.

1 cl, 3 tbl