METHOD OF DIVIDING CMOS INTEGRATED CIRCUITS BY RELIABILITY Russian patent published in 2024 - IPC G01R31/26 

FIELD: microelectronics.

SUBSTANCE: invention relates to microelectronics, specifically to methods of ensuring quality and reliability of integrated circuits (IC), manufactured by CMOS technology, and can be used for comparative assessment of reliability of batches of IC both at the stage of production and at incoming inspection of enterprises-producers of radioelectronic equipment. Method of separating ICs made using CMOS technology, in terms of reliability, involves measuring the level of low-frequency noise (LF noise) at the outputs of the IC before and after exposure to X-ray radiation with dose of 5400 R, followed by annealing. ICs are divided into reliable and potentially unreliable ones by the value of relative change in the level of low-frequency noise , where is the level of low-frequency noise of integrated circuits after irradiation of 5400 R and annealing, and is the level of low-frequency noise of integrated circuits before irradiation.

EFFECT: high reliability of the method without exceeding permissible values of influencing factors.

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