FIELD: computer engineering and microelectronics hardware monitoring and digital devices operating in remainder class system. SUBSTANCE: computer has eight AND gates, threshold-four majority element, two EXCLUSIVE OR gates, inputs of more and less significant bits of operand A, inputs of more and less significant bits of operand B, inputs of more and less significant bits of operand C, inputs of more and less significant bits of operand D, outputs of more and less significant bits of result S. Complexity of computer according to number of gate inputs is 34 and speed of response determined by circuit factor is 2τ, where t is delay for gate. EFFECT: improved design. 1 dwg, 1 tbl
Title | Year | Author | Number |
---|---|---|---|
MODULO 3 ADDER | 1992 |
|
RU2021630C1 |
MODULO 5 ADDER | 1992 |
|
RU2018931C1 |
MODULO-FIVE ADDER | 0 |
|
SU1803911A1 |
MODULO-FIVE ADDER | 1992 |
|
RU2012038C1 |
MODULO-THREE ADDER | 0 |
|
SU1830528A1 |
MODULO-THREE ADDER | 0 |
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SU1800453A1 |
DEVICE FOR CALCULATION OF SYMMETRICAL BOOLEAN FUNCTIONS | 1992 |
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RU2047894C1 |
MODULO-THREE ADDER | 0 |
|
SU1798777A1 |
DEVICE FOR EXECUTING MULTIPLICATION AND DIVISION OPERATIONS | 0 |
|
SU955038A1 |
MODULO 3 ADDER | 1992 |
|
RU2018927C1 |
Authors
Dates
1997-09-20—Published
1992-09-14—Filed