FIELD: devices with controllable time delay of operation, blasting controllable in time. SUBSTANCE: the circuit of programmable timer uses a counter, which contains a majority of successively arranged counter stages. A bistable logical circuit for reception of output signal from the previous stage and generation of input signal to the subsequent stage of the counter is located between each pair of the successive stages of the counter. Logical state of the input signal is determined by logical state of the output signal of the previous stage and by logical state of signal of the programming stage from the respective programming stage. Logical state of programming signal is determined by the state of the fuse connected to the programming stage. The selected fuses may operate at programming, the program includes actuation of counter stages, which turn out to be active at the required reading and produce a programming signal for operation of the fuse linked with the active stage of the counter. The programmable timer circuit is used in a detonator operating with a time delay relative to the blast initiation signal. EFFECT: enhanced reliability. 9 cl, 11 dwg
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Authors
Dates
1999-04-20—Published
1996-04-01—Filed