CASCADE CIRCUIT USING CMOS TRANSISTORS Russian patent published in 1999 - IPC

Abstract RU 2132591 C1

FIELD: computer engineering, in particular, design of VLSI for cascade logic and pipe-line data processing in design of arithmetical and logical gates. SUBSTANCE: each cascade of device has paraphase inputs. Goal of invention is achieved by inverse gate circuits 16, which are introduced into logical unit 5, and by additional gate circuits 17, 18. Second inverter 2, fixing flip-flop 6, and additional p-type transistors 7, 8 and 10-13 are also introduced into each cascade. EFFECT: increased functional capabilities. 4 cl, 5 dwg

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RU 2 132 591 C1

Authors

Krotov V.A.

Lementuev V.A.

Dates

1999-06-27—Published

1998-04-24—Filed