PARAPHASE LOGIC GATE OF CASCADE DEVICES BUILT AROUND CMIS TRANSISTORS Russian patent published in 2003 - IPC

Abstract RU 2209508 C1

FIELD: computer engineering. SUBSTANCE: device that may be used in MIS integrated circuits for implementing arithmetic and logic cascade units has first and second p-type transistors 1 and 2, respectively, n-type clock transistor 3, and logic unit 6 whose direct and inverted key circuits 7 and 6, respectively, are connected to paraphase inputs 12-22 of logic gate. First leads 16 and 17 of key circuits are connected to gates of p-type transistors of inverters 4 and 5. Key-circuit common lead 18 is connected to gates of n-type transistors of same inverters. EFFECT: enhanced speed of device. 1 cl, 2 dwg

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RU 2 209 508 C1

Authors

Lementuev V.A.

Dates

2003-07-27—Published

2002-05-13—Filed