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2 206 142

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Application

2002107350/28, 2002-03-25

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Start date

2002-03-25

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Actual filing date

2002-03-25

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Published

2003-06-10

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Inventor

Andreev V.V.Baryshev V.G.Bondarenko G.G.Maslovskij V.M.Maslovskij M.V.Stoljarov M.A.Tkachenko A.L.Ulunts G.A.

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Holder

Andreev Vladimir ViktorovichStoljarov Maksim Aleksandrovich

METHOD FOR MANUFACTURING MIS TRANSISTORS Russian patent published in 2003 - IPC

Abstract RU 2206142 C1

FIELD: semiconductor technology. SUBSTANCE: method intended to manufacture metal-insulator-semiconductor (MIS) transistors and integrated circuits includes formation of source and drain regions, and sub-gate layer with electron traps on silicon wafer, formation of metal interconnections, evaluation of threshold voltage adjustment value ΔU, variation of threshold voltage by external action during wafer heating, strong-field tunnel electron injection from silicon to sub-gate dielectric by dc pulse being used as external action with pulse density ranging between 10-7 and 10-4 A/cm2; during injection voltage ΔUinj, across MIS structure is checked up and as soon as it reaches ΔUinj = ΔU, injection is ceased; wafer temperature is chosen between 200 and 250 C. EFFECT: facilitated procedure, enhanced precision of transistor threshold voltage adjustment. 2 cl, 2 dwg

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RU 2 206 142 C1

Authors

Andreev V.V.

Baryshev V.G.

Bondarenko G.G.

Maslovskij V.M.

Maslovskij M.V.

Stoljarov M.A.

Tkachenko A.L.

Ulunts G.A.

Dates

2003-06-10—Published

2002-03-25—Filed

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