METHOD FOR PRODUCING MIS TRANSISTORS Russian patent published in 2003 - IPC

FIELD: semiconductor engineering; manufacture of metal-insulator- semiconductor transistors and integrated circuits. SUBSTANCE: method includes formation of source and drain regions, and sub-gate insulator on silicon wafer, formation of metal interconnections, estimation of adjustment of threshold voltage ΔU_o and next adjustment of threshold voltage by external action on value of ΔU_o±ΔU followed by thermal annealing, where signs "+" and "-" for n- and p-channel MIS transistors; ΔU is change in threshold voltage value during thermal annealing. External action is applied by heavy field-effect tunnel injection of electron charge into sub-gate insulator, electron-charge density being where q is electron charge, C; σ is electron trap capture section in sub-gate insulator, sq. cm; U_s is saturation voltage of MIS transistor threshold voltage varying in the course of injection. EFFECT: facilitated procedure; enhanced precision of threshold voltage adjustment. 2 cl, 2 dwg