FIELD: electrical communications; frame synchronization of messages in digital data transmission systems. SUBSTANCE: decision on presence of frame synchronization marker in input sequence is taken upon arrival of input sequence in serial-parallel code of groups of K (K > 1) characters, that is, when input sequence is shifted by K binary characters. Outputs of memory items of each preceding group of memory items are connected to inputs of memory items of next group of memory items; outputs of items for comparison with marker word starting from second comparison item and up to last but one item are coupled with inputs of first-step coincidence code analyzing unit and output of this unit is connected to second inputs of first and last items for comparison with reference marker word and also it is coupled with input of second-step coincidence-code analyzing unit; outputs of first and last comparison items are connected to inputs of second-step coincidence-code analyzing unit. EFFECT: enhanced speed of frame synchronization marker separation. 1 cl, 3 dwg
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Authors
Dates
2003-08-20—Published
2001-08-24—Filed