FIELD: pulse engineering.
SUBSTANCE: proposed flip-flop device has RS flip-flops 3, 16, EXCLUSIVE OR gates 1, 2, NAND gates 5, 6, NOR gates 10, 11, resistors 4, 7, 12, 13, capacitors 14, 15, memory items 8, 9 built around magnetic core with rectangular hysteresis loop and single center-tapped coil, input bus 21, and common bus 22. Combining read and write coils of memory items 8, 9 makes it possible to increase turn number in read and write coils by 1.5 times, in each of half-coils of memory items 8 and 9, which reduces magnetizing current through cores of memory items 8 and 9 approximately by 1.5 times due to enhancing ratings of limiting resistors 4 and 7.
EFFECT: reduced input current from power supply.
1 cl, 1 dwg
| Title | Year | Author | Number |
|---|---|---|---|
| FLIP-FLOP FACILITY | 2001 |
|
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SU1753919A1 |
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RU2106742C1 |
