FIELD: pulse engineering.
SUBSTANCE: proposed flip-flop device has RS flip-flop built around NOR gates 22, 23, 26, 27, and also NOR gates 4-1, 4-2, 5-1, 5-1, control unit 3, diodes 10, 11, resistors 12 - 17, capacitors 6 - 9, memory elements 18, 19 built around rectangular hysteresis loop cores provided with center-tapped leads connected to resistors 15, 17, at least one input bus 20, and common bus 21. Write and read windings of memory elements 18, 19 are made in the form of single center-tapped winding and new connections are introduced between memory device components.
EFFECT: enhanced immunity to persistent intensive noise.
1 cl, 2 dwg
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