FIELD: physics, measurement.
SUBSTANCE: invention relates to instrumentation, in particular, to methods of correction of analogue-to-digital conversion (ADC) errors for use in information and measuring systems. The ADC error correction method involves testing and correction; corrected n-bit ADC (7) is tested continuously during 2n cycles since the moment of its activation, by applying a test signal generated by high-precision n-bit DAC (5) to the ADC input, with subsequent storing, in (the random-access memory) (RAM) (8), the ADC (7) output pattern difference code and the cycle number code, by the address of the output pattern of corrected n-bit ADC (7). After the continuous testing completion, periodic ADC (7) testing and error correction processes alternating during one cycle are performed; in the correction mode, the output pattern of ADC (7) serves simultaneously as the minuend code and the address of the subtrahend code (in (n+1)-bit adder) (9) - the code written to RAM (8) earlier, during the testing mode, carrying information about the deviation of the actual conversion response of ADC (7) from the ideal one. The device also includes clock oscillator (1), n-bit binary counter (2), (n+1)-input AND element (3), 2x(n+1)-input inverting digital switch (4), analogue signal switch (6), OR element (10), and halver (11).
EFFECT: simplification of analogue-to-digital conversion error correction method and increase in its accuracy and speed.
2 cl, 6 dwg
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Authors
Dates
2008-06-10—Published
2007-03-12—Filed