ENERGY EFFICIENT INSTRUCTION PRE-FETCHING MECHANISM Russian patent published in 2009 - IPC G06F12/00 G06T1/20 

FIELD: physics; computer engineering.

SUBSTANCE: invention relates to processors, specifically to an energy-efficient method of pre-fetching processor instructions. The processor includes a mechanism for predicting conditional breakpoint instructions, which generates weighted values for branch prediction. For weakly weighted predictions, the energy spent during filling and subsequent cache clean up is saved by stopping instruction pre-fetching. Instruction pre-fetching continues when the branch condition is evaluated in the conveyor and the real next address becomes known. Alternatively, instruction pre-fetching can continue outside the cache. In order to prevent substitution of correct data in the cache by instructions which are selected with prediction based on wrongly predicted branching, pre-fetching can be stopped in response to weakly weighted prediction in case of unsuccessful access to the cache.

EFFECT: maximisation of accuracy of predicting branching and minimisation of negative effects of wrongly predicted branching.

11 cl, 3 dwg, 1 tbl