FIELD: data processing.
SUBSTANCE: invention relates to microprocessor equipment, in particular to microprocessors with pipeline command processing. Proposed processor comprises pipeline, cache memory and transition predictor. Cache memory includes storage of called addresses and storage of transit addresses. Transition predictor is capable for each calling command to determine the state when the called command is to be loaded after the calling command into the pipeline. Storage of called addresses is capable of storing the called address in its unit storage structure, which identifies the unit storage structure belonging to external memory and storing the called command. Storage of called addresses is capable of storing each called address only in one of its unit storage structures.
EFFECT: reduced total amount of cache memory required to store called addresses with respect to the same number of calling instructions.
3 cl, 4 dwg
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