FIELD: information technology.
SUBSTANCE: apparatus has an arithmetic-logic circuit configured to iteratively process operands of a first precision to obtain a result; and a precision control circuit configured to receive a programmable bit precision (PBP) which indicates the expected second precision which is less than the first precision, and enables the processor to complete iterative processing when the result reaches the programmed second precision which is less than the first precision.
EFFECT: low power consumption of the processor during computation.
15 cl, 6 dwg
