FLOATING-POINT QUANTUM EXCLUSION DETECTION Russian patent published in 2014 - IPC G06F7/499 G06F9/302 

Abstract RU 2526004 C2

FIELD: physics, computer engineering.

SUBSTANCE: group of inventions relates to computer engineering and can be used in arithmetic processors. A processor receives at least one floating-point operand and performs a floating-point operation using at least one floating-point operand to provide a floating-point result. The method includes determining if a preferred quantum is stored in the floating-point result, said quantum indicating a value which is presented as the least significant digit of the significant of the floating-point result. An indication of the occurrence of a quantum exclusion is provided at the output in response to the determination that the preferred quantum is not stored.

EFFECT: high accuracy.

18 cl, 3 dwg

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RU 2 526 004 C2

Authors

Ehrik Mark Shvarts

Fil E

Majkl Frederik Kaulisho

Zil'Vija Melitta Mjuller

Dates

2014-08-20Published

2010-11-08Filed