FIELD: information technologies.
SUBSTANCE: device comprises a matrix of m lines and n columns of homogeneous medium elements, n blocks of units count, a unit of maximum detection, a summator, a memory unit, a unit to form a matrix of incomplete parallelism, containing a matrix of (i.j) (i=1,2,…,N, j=1,2,…,M) D-triggers of input data recording synchronisation, a clock oscillator, a counter of initial data download timing pulses, the first decoder of a strobe number, the second decoder of a line number, a column number counter, two double-port main memories to process a matrix of input variables, six D-triggers, four AND gates, two multiplexers, an OR gate, a line number counter, a comparator of comparison to zero, two single-port main memories, a code converter from a parallel to a serial one, a code converter from a serial to a parallel one.
EFFECT: expansion of device application field due to formation of matrix of incomplete parallelism.
8 dwg
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Authors
Dates
2011-06-20—Published
2009-02-17—Filed