CASCODE DIFFERENTIAL OPERATIONAL AMPLIFIER WITH LOW ZERO OFFSET VOLTAGE AND HIGH GAIN Russian patent published in 2011 - IPC H03F3/45 

Abstract RU 2426221 C1

FIELD: radio engineering.

SUBSTANCE: cascode differential operational amplifier has an input differential stage (1) with first (2) and second (3) collector outputs, where the first collector output (2) is connected to the emitter of the firs (4) output transistor, the second (3) collector output is connected to the emitter of the second (5) output transistor, emitters of the first (4) and second (5) output transistors are connected through the corresponding first (6) and second (7) current stabilising two-terminal networks to the first (8) power supply bus, a potential bias circuit (9) which is connected to the combined bases of the first (4) and second (5) output transistors, a first (10) current mirror, the input of which is connected to the collector of the second (5) output transistor, and the output is connected to the collector of the first (4) output transistor and the base of the third (11) output transistor, the collector of the third (11) output transistor is connected to the output of the device (12) and is connected through the third (13) current stabilising two-terminal network to the first (8) power supply bus, the second (14) power supply bus, connected to the common emitter output of the first (10) current mirror, the input of the differential stage (1) and the emitter of the third (11) output transistor. The circuit also includes a second (15) current mirror, as well as a first (16) and a second (17) additional transistor, where the base of the first (16) additional transistor is connected to the base of the third (11) output transistor, the emitter is connected to the second (14) power supply bus, the collector of the first (16) additional transistor is connected to the input of the second (15) current mirror, the common emitter output of the second (15) current mirror is connected to the emitter of the second (17) additional transistor, the output of the second (15) current mirror is connected to the second (14) power supply bus, the base of the second (17) additional transistor is connected to the second (3) collector output of the input differential stage (1), and the collector of the second (17) additional transistor is connected to the first (8) power supply bus.

EFFECT: low zero offset emf with increase in voltage gain of the open differential amplifier.

6 dwg

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RU 2 426 221 C1

Authors

Prokopenko Nikolaj Nikolaevich

Budjakov Petr Sergeevich

Serebrjakov Aleksandr Igorevich

Dates

2011-08-10Published

2010-04-27Filed