FIELD: electricity.
SUBSTANCE: differential amplifier comprises the first (1) and second (2) input transistors, combined emitters of which are connected to the first (3) source of supply via the first (4) current-stabilising dipole, a current mirror (5), a common emitter output of which is connected to the second (6) source of supply, the first (7) output transistor, the emitter of which is connected to the second (6) source of supply, the collector is connected to the device output (8) and via the second current-stabilising dipole (9) is connected to the first (3) source of supply, and the base is connected to the output of the current mirror (5) and the collector of the second (2) input transistor, besides, the collector of the first (1) input transistor is connected to the input of the current mirror (5). The circuit includes the third (10) and fourth (11) input transistors, emitters of which are connected to emitters of the first (1) and second (2) input transistors, the collector of the fourth (11) input transistor is connected to the collector of the second (2) input transistor, bases of the second (2) and fourth (11) input transistors are connected, bases of the third (10) and first (1) input transistors are connected to each other, the collector of the third (10) input transistor is connected to the second (6) source of supply, the base of the first (12) additional transistor is connected to the base of the first (7) output transistor, the emitter of the first (12) additional transistor is connected to the bus of the second (6) source of supply, the collector of the first (12) additional transistor is connected to the emitter of the second (13) additional transistor, the base of the second (13) additional transistor is connected to the collector of the first (1) input transistor, and the collector of the second (13) additional transistor is connected to the first (3) source of supply, besides, the current transfer ratio of the current mirror (5) is close to two units.
EFFECT: higher amplification ratio, reduced zero shift voltage.
3 cl, 6 dwg
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Authors
Dates
2012-03-27—Published
2010-05-07—Filed