FIELD: information technology.
SUBSTANCE: frame synchronisation device, having a shift register, a decoder, generating equipment, a clock-frequency discriminator, a channel distributor, four AND elements, two logic inverters, two OR elements, lock-in and -out accumulators, a first adder, a first threshold device, two multipliers, a flip-flop and a frequency divider, also includes a second adder, a second threshold device, a fifth AND element and the number of shift register cells is equal to the number of code word symbols (n, k) of a linear block code used in a digital transmission control channel.
EFFECT: reduced probability of false frame synchronisation of digital transmissions in which frames contain symbols of combined digital transmissions and n control channel symbols, including a clock signal combination consisting of m successive symbols, housekeeping symbols, and verification symbols of a linear block code.
4 dwg
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Authors
Dates
2012-05-10—Published
2009-07-01—Filed