DUAL POWER SCHEME IN MEMORY CIRCUIT Russian patent published in 2013 - IPC G11C8/08 G11C11/413 G11C5/14 

FIELD: information technology.

SUBSTANCE: dual voltage semiconductor memory device having a plurality of write drivers receiving low voltage data input signals; a plurality of bit lines connected to the plurality of write drivers, wherein the plurality of write drivers is configured to write low voltage data input signals in the plurality of bit lines in response to reception of low voltage data input signals; a timing tracking circuit configured to delay a high voltage number line signal in accordance with the time associated with the plurality of write drivers which write low voltage data input signals; and a plurality of memory cells which react to the high voltage number line signal and the plurality of write drivers writing the low voltage data input signals.

EFFECT: reduced power consumption.

30 cl, 6 dwg