FIELD: information technologies.
SUBSTANCE: integrated circuit comprises multiple memory interrogators and super memory cell. The super memory cell comprises multiple memory banks, every of which generates an appropriate range of separately addressable memory cells, at the same time the super memory cell comprises multiple bank groups. Each of multiple bank groups comprises a subset of many memory banks and an appropriate dedicated access port. Besides, the integrated circuit comprises a switchboard connected between multiple memory interrogators and the super memory cell. The switchboard is made as capable of, as a reaction to a memory request from the side of one specific interrogator from multiple memory interrogators, connecting a route of data transfer between this specific memory interrogator and a dedicated port of access of the specific one of bank groups, to which the memory request is addressed.
EFFECT: provision of connection of a transfer route of multiple memory interrogators, so that a specific memory interrogator and a dedicated port of access of one specific bank group, to which a memory request is addressed, are connected.
19 cl, 7 dwg
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Authors
Dates
2013-05-10—Published
2010-02-12—Filed