FIELD: information technology.
SUBSTANCE: device comprises a memory device with one or more memory elements; a memory control logic made to: receive a request from a requester via a data bus for data stored in one or more memory elements; and extract data from the said one or more memory elements, determine whether the data bus is idle, and in response to determining that the data bus is idle: transmit data from the device to the requester via the data bus; initiate an error correction code algorithm after start of data transmission; and transmit the error correction code to the requesterer via the data bus.
EFFECT: reduced memory access time.
10 cl, 8 dwg
| Title | Year | Author | Number |
|---|---|---|---|
| DISPLAY OF IMBEDDED ADDRESS OF ECC | 2014 |
|
RU2644529C2 |
| MEMORY CONTROL | 2014 |
|
RU2643499C2 |
| SYSTEM AND METHOD FOR LOW-POWER LOGIC FOR NUMBER BUS IN MEMORY | 2007 |
|
RU2424586C2 |
| DEVICE, SYSTEM AND METHOD OF IMPROVING CORRECTION OF APPARATUS-SPECIFIED ALGORITHM | 2014 |
|
RU2580404C2 |
| INSTRUCTION AND LOGIC FOR MEMORY ACCESS IN A CLUSTERED WIDE-EXECUTION MACHINE | 2013 |
|
RU2662394C2 |
| METHOD, DEVICE AND SYSTEM TO REDUCE DOWN TIME FOR ROOT PORT AND ENDPOINT INTEGRATED INTO THE ROOT PORT TO RESUME OPERATION | 2014 |
|
RU2586022C2 |
| METHOD, DEVICE AND SYSTEM OF WORK RESTART TIME REDUCING FOR ROOT PORTS AND END POINTS INTEGRATED INTO ROOT PORTS | 2014 |
|
RU2645596C1 |
| UNLIMITED TRANSACTIONAL MEMORY WITH ASSURANCES OF MOVEMENT DURING TRANSFER, USING HARDWARE GLOBAL LOCK | 2014 |
|
RU2597506C2 |
| PARALLEL-MATCHED BUS SYSTEM | 2001 |
|
RU2239230C2 |
| PROVIDING SNOOP FILTERING ASSOCIATED WITH DATA BUFFER | 2013 |
|
RU2608000C2 |
