f3 ADDER FUNCTIONAL STRUCTURE (Σ) OF ARBITRARY "g" DIGIT IMPLEMENTING DECODING PROCEDURE FOR ARGUMENTS OF SUMMANDS [S ]f(2) AND [S ]f(2) OF POSITION FORMAT "EXTRA CODE RU" BY ARITHMETIC AXIOMS OF TERNARY NOTATION f(+1,0,-1) AND DOUBLE LOGICAL DIFFERENTIATION d/dn → f(←↓) OF ACTIVE ARGUMENTS OF "LEVEL 2" AND REMOVAL OF ACTIVE LOGICAL ZEROES "+1""-1"→"0" IN "LEVEL 1" (VERSIONS OF RUSSIAN LOGIC) Russian patent published in 2014 - IPC G06F7/505

Abstract RU 2517245 C9

FIELD: physics, computation hardware.

SUBSTANCE: set of inventions relates to computers and can be used for construction of arithmetic devices and execution of arithmetic procedures of adding of position arguments of analogue signals added with application of arithmetic axioms of ternary notation f(+1,0,-1). In compliance with one of versions, functional structure is constructed with application of logical elements AND, OR, NO.

EFFECT: higher speed.

4 cl

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RU 2 517 245 C9

Authors

Petrenko Lev Petrovich

Dates

2014-05-27—Published

2011-12-20—Filed