INSTRUCTION AND LOGIC FOR IDENTIFICATION OF INSTRUCTIONS FOR REMOVAL IN MULTI-FLOW PROCESSOR WITH SEQUENCE CHANGING Russian patent published in 2018 - IPC G06F9/38 

FIELD: information technology.

SUBSTANCE: processor comprises the first logic for execution of the instruction flow with sequence change, wherein the instruction flow is divided into a plurality of subflows, wherein the instruction flow and each subflow are ordered by a program order (PO); the second logic for determination of the oldest unsent instruction in the instruction flow and storage of the associated PO value of the oldest unsent instruction as a pointer to the executed instruction, the instruction flow includes sent and unsent instructions; the third logic for determination of the last remote instruction in the instruction flow and storage of the associated PO value of the last remote instruction as a deletion pointer; the fourth logic for selection of a range of instructions between a deletion pointer and a pointer to the executed instruction, and the fifth logic for identification of instructions in the range to be deleted.

EFFECT: increased throughput of pipeline processing and improved productivity.

20 cl, 34 dwg