DELAY-INSENSITIVE BUFFER FOR COMMUNICATION WITH ACKNOWLEDGEMENT Russian patent published in 2016 - IPC G06F13/14 G06F13/38 G06F12/00 

FIELD: computer engineering.

SUBSTANCE: device for processing transactions contains transaction data storage unit for storage of transactions data to be transmitted at intercomponent connection; buffer transactions for buffering data transactions and logical unit transactions for transmitting a signal with a request (REQ) arbitrator in response to the first data transactions, which are available in transaction data storage unit, extracting in response to signal resolution (GNT), received from an arbitrator, second transaction data from the buffer transactions and transmission of second data transactions on an interconnect and buffer filling transactions third data transactions, extracted from data storage unit transactions, after sending the second data transactions on an interconnect, the logic unit transactions is made with possibility of increasing the counter value in response to determination that the buffer transactions is filled after signal transmission REQ, the value of the counter is a number of signals REQ, on which do not response and whose associated data transactions are not buffered in a buffer transactions.

EFFECT: dependence decrease of depth buffer transactions from latency of communication with acknowledgement.

14 cl, 27 dwg, 1 tbl