FIELD: computer equipment.
SUBSTANCE: invention relates to computer equipment. Device contains N bits of the input binary number D1, D2, …, DN, that are divided into L groups of M digits in the group (N = L * M), Z steps of blocks of elements, where Z = ]log2L[ +1 (greater integer), at that the first stage contains L blocks of elements, 1L of the first type, and each i-th stage contains L / 2 (i-1) blocks of elements of 2ij of the second type, 1L of the first type of the first stage contains (M-1) stages of drivers of ordered binary numbers, 3 (M-1), that are combined into a pyramid structure, each v-th cascade 3v (v = 1, …, (M-1)) contains a group of (Mv) elements OR, 4 (Mv), a group of (Mv) elements EXCLUSIVE OR, 5 (Mv), OR element with one inverse input, a group of (M-1) modules of the account of lower ordered units, 7 (M-1), the first group of M adders, 8M, the module of the account of units and the second multigroup adder, each block of elements 2ij of the second type contains a third group of (M * 2 (i-2) +1) adders AND, the fourth adder, the group shift module, the module for generating the shift code and the code for the total number of groups.
EFFECT: technical result is broader functional capabilities.
1 cl, 3 dwg, 3 tbl
Authors
Dates
2019-02-26—Published
2018-04-13—Filed