FIELD: encoding and decoding devices.
SUBSTANCE: invention relates to means for encoding and decoding digital images. A digital image is read from the array of external memory in the form of a two-dimensional block Ci,j of size NCB = NC × NC, where N C is the number of pixels in a row/column, to obtain a one-dimensional block which is stored in a register encoder memory. Simultaneously, the coder calculates the number of the upper bit plane MSB of the two-dimensional block Ci,j, analyzes the signs of its significant pixels Sk, from the one-dimensional block, the bit planes BPn are identified, where n is from 0 to MSB, which are further sequentially and independently from each other treated. For each bit plane, forming L-level hierarchical binary quad tree mHQT, where L = log4NCB, wherein zero level is formed by copying all bits of bit plane BPn, and subsequent levels are filled on the basis of previous by estimation of significance of their bits according to formula where further compactness of map of significance CL for obtained L-level hierarchical binary quadruple.
EFFECT: technical result is higher efficiency of digital image processing.
2 cl, 3 dwg
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Authors
Dates
2020-06-18—Published
2019-08-30—Filed