GENERATOR OF WRITE PULSES FOR MEMORY UNIT Russian patent published in 1997 - IPC

FIELD: electronics, in particular, chips for memory units. SUBSTANCE: delay line 3 which determines duration of generated pulses is designed as serial circuit of model 7 of information writing circuit of memory unit and memory register 8 which is same as that of information accumulation unit. In addition device has first and second D flip-flops 1 and 2, XOR gate 4, generated pulse output 5 and clock input 6. EFFECT: correlation of duration of generated write pulses and real processes of switching memory registers and signal traveling time in writing circuit of memory unit. 2 dwg