FIELD: computer engineering. SUBSTANCE: device has memory unit (SRAM), which has first and second ports, first port command circuit SPM, which is connected to first port, input synchronous multiplex communication line (ME) and output synchronous multiplex communication line (MS). In addition device has command circuit of second port (APM), which is connected to second port, input asynchronous communication channel (LE) through FIFO-type sequence of memory registers (M), as well as to output asynchronous communication channel (LS). Command (MF) which is sent to command circuits of port from external source, provides selection of operation mode of converter. First operation mode M32 provides mapping of time interval of one frame of synchronous multiplex system to single communication channel. Second operation mode M1 provides mapping of all time intervals of one synchronous frame to one channel. EFFECT: increased functional capabilities. 4 cl, 7 dwg
