FIELD: telecommunications, in particular, equipment for data transmission. SUBSTANCE: reordering part of reordering system (RS) has two inputs (SIn), which are connected to inputs (I2n) of asynchronous switching circuit (SN2) through transmission lines (TLn), which are arranged in line groups (LG). Communication elements which are transmitted from inputs to outputs (N2m) of asynchronous switching circuit are subjected to first time delay and then stored in reordering buffer (R2m) for second time delay before they are sent to device output. Value of second delay conforms to condition that sum of first and second delays is equal to preliminary defined constant value. Size of reordering buffer conforms to condition of difference between said preliminary defined constant value and fixed transmission line delay, which is lowest limit of transmission of any element from input to output. EFFECT: increased phasing precision. 10 cl, 3 dwg
