FIELD: electronics. SUBSTANCE: invention is intended for test of integrity of double-spot connection on circuit board with use of International JTAG standard. In accordance with invention one of systems has circuit board with circuit subject to test, buses, not less than one peripheral slot or expansion slot, separable test boards for test in agreement with JTAG standard. In correspondence with alternative variant system also has register of separation surface, connection slots, circuit controlling process of scanning of separation surface, instruction recorder, connection ( TAP ) controller. Separable test board includes connection slot, buffer circuit, buses. Another variant of separable board has two connection slots, integral circuit with aggregate of bus transceivers. Operation of systems is given in description. EFFECT: possibility of test of individual circuits on printed circuit board and connections ganged up to separable slots. 14 cl, 8 dwg
Authors
Dates
2002-05-20—Published
1996-11-13—Filed