FIELD: electronics. SUBSTANCE: invention is related to circuit that uses JTAG structure to scan interface, specifically, to circuits incorporating output path for transmission of discrete data controlled by JTAG test register. Test JTAG circuit makes it possible to transfer assemblage of connections of path for transmission of discrete data in integrated circuit to state of high impedance. Test circuit incorporates register for recording of interface scanning data, shift register of interface scanning data connected to it and switching circuit connected to shift register. Resolution cells of output of shift register are grouped in tight logic proximity. Operation of specified test circuit is given in description of invention. EFFECT: raised testing efficiency. 5 cl, 3 dwg
