FIELD: digital computer engineering; modeling combinatorial problems in designing radio equipment, computer-aided control systems, and computer hardware and software. SUBSTANCE: device has shift registers, permutation shaping unit, read-only memory unit, best version memory unit, switch, arithmetic-logic device , graph electronic model, group of OR gates, OR gate unit, arc selection decoder, reversing location counter, random-access memory, topology counter, distance counter, multiplier, adder, minimal link length register, comparison gates, subtracter, start-of-count flip-flop, mode flip-flop, topology setting flip-flop, link length register, arc register, arc hold decoder, arc number register, minimal weight register, group of AND gates, AND gate, one-shot multivibrator, and delay circuits. Novelty is introduction of means for disposing weighted graphs in linear and circular topological model and also means for assessing how is new disposition close to optimal one. EFFECT: enlarged functional capabilities. 2 cl, 8 dwg
