FIELD: pulse engineering. SUBSTANCE: flip-flop device of first design version has RS flip-flop, first and second EXCLUSIVE OR gates, first and second magnetic-core storage cells, first and second diodes, first and second capacitors, first and second resistors; read-out coil inputs of first and second magnetic core storage cells are connected to common bus of power supply and their outputs, through first and second diodes conducting in forward direction, to power supply, to flip-flop set and reset input, respectively, which are connected to common bus of power supply through first and second capacitors, respectively, and to first leads of first and second resistors, respectively, whose second leads are interconnected; write winding inputs of first and second storage cells are connected to outputs of first and second EXCLUSIVE OR gates, respectively, whose first inputs are connected to input bus of device and second one, to direct and inverted outputs of flip-flop, respectively; novelty is that device is provided, in addition, with pulse shaper and first bidirectional switch; pulse shaper input is connected to output of one of EXCLUSIVE OR gates, shaper output is connected to second leads of first and second resistors and to control input of bidirectional switch inserted between outputs of write winding and second magnetic-core storage cell. Second design version of flip-flop device is distinguished by including third and fourth EXCLUSIVE OR gates, second bidirectional switch, third and fourth resistors, third capacitor; first input of EXCLUSIVE OR gate is connected through third resistor to shaper input and through fourth resistor, to second input of third EXCLUSIVE OR gate which is connected to first input of fourth EXCLUSIVE OR gate and through third capacitor, to common bus of power supply; output of third EXCLUSIVE OR gate is connected to shaper output, to second input of fourth EXCLUSIVE OR gate, and to control input of second bidirectional switch inserted between first input of third EXCLUSIVE OR gate and output of fourth EXCLUSIVE OR gate. EFFECT: reduced input current in static operation.
Title | Year | Author | Number |
---|---|---|---|
FLIP-FLOP DEVICE | 2002 |
|
RU2248662C2 |
FLIP-FLOP DEVICE | 2003 |
|
RU2250554C1 |
FLIP-FLOP DEVICE | 2003 |
|
RU2250555C1 |
TRIGGER DEVICE | 2003 |
|
RU2237967C1 |
FLIP-FLOP DEVICE | 2003 |
|
RU2248663C1 |
FLIP-FLOP DEVICE | 2003 |
|
RU2250557C1 |
NONVOLATILE MEMORY LOCATION | 1999 |
|
RU2215337C2 |
FLIP-FLOP DEVICE | 0 |
|
SU813709A1 |
VERSIONS OF TRIGGER DEVICE | 0 |
|
SU970650A1 |
CONTROLLED TIMER | 1990 |
|
RU2037872C1 |
Authors
Dates
1997-09-10—Published
1983-07-07—Filed