FIELD: engineering of pseudo-noise series generators with arbitrary number of bits, while said number of bits is transferred in parallel manner during each clock pulse.
SUBSTANCE: beginning values of states are loaded in registers of parallel pseudo-noise generator, which immediately generates following n bits of pseudo-noise series, where n - arbitrary number, depending on required productiveness level. Then, first sub-portion of pseudo-noise generator in accordance to invention receives current state of pseudo-noise generator and outputs state of n bits pseudo-noise generator in the future.
EFFECT: increased speed of operation, realization of parallel processing for capturing and demodulating processes.
3 cl, 9 dwg
