FIELD: information technologies.
SUBSTANCE: device receives any two-level or three-level differential coded signal of sequential binary self-synchronizing code (SBSC) with transformation into two-digit asynchronous coded signal IX(1:0) and further noise-immune performance of full function of this signal synchronization with the help of input continuous sequence of clock pulses IC due to noise-immune formation of output synchronized coded signal OX(1:0), output clock signal OCX of coded signal OX(1:0) and output clock signals of beginning of pause OPC and pause OPX, and may be used as synchronous noise-immune shaper of synchronized coded signal OX(1:0) and clock signals OCX, OPC, OPX for any two-level or three-level SBSC. Result is achieved with the help of continuous sequence of input clock pulses 1C due to noise-immune formation of output synchronized coded signal OX(1:0), output clock signal OCX of coded signal OX(1:0) and output clock signals of beginning of pause OPC and pause OPX for any two-level or three-level SBSC with the help of barrage filtration of asynchronous coded signal 1X(1:0) as noise, while duration of every change of this signal does not exceed threshold duration P·Tic, where P≥1 - threshold integer number, Tic - duration of clock pulses 1C period. Device contains triggers, synchronous counter, detector-transducer, register, elements OR-NOT, delay element, element AND, elements AND-NOT, elements OR, comparators, inlets of differential coded signal, clock pulse inlet, code outlet of synchronized coded signal, outlets of clock signals of coded signal, beginning of pause and pause, code inlet of pause detection threshold and code inlet of coded signal clock signal detection threshold.
EFFECT: higher noise-immunity of device.
1 dwg
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Authors
Dates
2009-01-20—Published
2007-06-04—Filed