CODE SIGNAL SYNCHRONISER Russian patent published in 2009 - IPC H03K5/135 

Abstract RU 2345479 C1

FIELD: physics, radio.

SUBSTANCE: code signal synchroniser refers to pulse digital technology, is aimed at phasing to electrical zero of input asynchronous code signal of digit capacity M≥2 (synchronised code signal and code synchrosignal shaping on digit outputs and code signal synchrosignal, interruption and interruption start shaping on the first, second and third outputs respectively) at barrier filtration of input code signal synchronisation as an interference with at variation length not exceeding threshold length counted by continuous input sequence of clock pulses, and can be used for designing synchronous devices of noise-immune asynchronous code or single commands or data input and data exchange (commands and data), e.g., between two synchronous devices, each of which has proper clock frequency. Technical result is higher noise stability of the device and its enhancement due to input clock pulse IC performing full synchronisation of input asynchronous code signal ID (1:M) of digit capacity M≥2 (synchronised code signal OD (1:M) and code synchrosignal OCD (1:M) shaping on digit outputs and code signal OD (1:M) synchrosignal OCD, interruption synchrosignal OPD and interruption start synchrosignal OPC shaping on the first, second and third outputs respectively) at barrier filtration of input asynchronous code signal synchronisation an interference with at variation length not exceeding threshold length P·Tic at P≥2, where Tic is clock pulse period, P is threshold number. The device contains three triggers (1-3), binary synchronous counter (4), three OR-NOT elements (5-7), three AND-NOT elements (8-10), five OR elements (11-15), delay element (16), AND element (17), bit inputs of asynchronous code signal ID(1:M) of digit capacity M≥2, M of signal shapers, specifically if M=2, shapers (18) and (19), clock input (20), code input (21) of code signal synchrosignal detection threshold, three outputs being outputs of triggers (1), (2), OR-NOT element (5) and outputs code signal synchrosignal OCD, interruption OPD, interruption start OPC respectively, and digit outputs of synchronised code signal OD (1:M) and its code synchrosignal OCD (1:M), being respectively data outputs and outputs of synchrosignal shapers (18) and (19).

EFFECT: higher noise stability of the device and its enhancement.

1 dwg

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RU 2 345 479 C1

Authors

Kiselev Evgenij Fedorovich

Zelenov Aleksandr Jur'Evich

Dates

2009-01-27Published

2007-06-04Filed