DIGITAL SIGNAL CLOCK SYNCHRONIZATION DEVICE Russian patent published in 2006 - IPC H03K5/05 

FIELD: digital pulse engineering.

SUBSTANCE: proposed device functions to generate sync signal and its clock sync signal at its outputs and to pass the latter signal through rejection filter as noise of input digital signal being synchronized at length of its zero or one phase not over that of input clock pulse period. Device has three flip-flops, logical 1 input, clock input, input of digital signal being synchronized, and first output; novelty is that newly introduced in device are NOR gate, EXCLUSIVE OR gate, and second output; first output of device is used as that of third flip-flop and synchronized signal and second output, as that of clock sync signal connected to output of second flip-flop, clock input of third flip flop, and second input of NOR gate.

EFFECT: enhanced noise immunity, enlarged functional capabilities.

1 cl, 1 dwg