FIELD: physics.
SUBSTANCE: invention relates to design of power semiconductor devices. The power semiconductor device which is based on an n-type silicon wafer with two main surfaces, having at least one emitter n+-layer on the side of the first main surface, a base p-layer which comes out to the first main surface and forms an emitter n+-p-junction with the emitter n+-layer, a base n-layer adjacent to the base p-layer and forms a collector p-n-junction with it, an emitter p-layer on the side of the second main surface, metallisation of emitter p+- and n+-layers and a base p-layer of a p+-n-p-type triode zone between metallisations of the emitter p+-layer and base p-layer and around it a p+-n-p-n+-type thyristor zone between metallisations of the emitter p+- and n+-layers, a local region with hydrogen-containing donors in the base n-layer within the p+-n-p-type triode zone lying between the collector p-n-junction and the middle of the base n-layer and spreading to at least part of the thyristor zone adjacent to the triode zone, an additional area with hydrogen-containing donors in the base p-layer which lies under the peripheral part of the emitter n+-layer.
EFFECT: high critical rate of rise of current when switching the device in case of overvoltage.
2 dwg
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Authors
Dates
2011-01-27—Published
2009-07-22—Filed