FUNCTIONAL STRUCTURE OF PARALLEL-SERIES MULTIPLIER f(Σ) IN POSITION FORMAT OF MULTIPLICAND [m]f(2) AND MULTIPLIER [n]f(2) Russian patent published in 2012 - IPC G06F7/527

Abstract RU 2439660 C2

FIELD: information technologies.

SUBSTANCE: multiplier is made in the form of two channels equivalent in structure to generate an intermediate sum of junior and senior digits, every of which contains logical AND functions to generate arguments of partial products, and summators.

EFFECT: simplified structure and increased efficiency of a parallel-series multiplier.

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RU 2 439 660 C2

Authors

Petrenko Lev Petrovich

Dates

2012-01-10—Published

2010-03-04—Filed