METHOD FOR FILED TRANSISTOR MANUFACTURING Russian patent published in 2012 - IPC H01L21/335 B82B3/00 

Abstract RU 2463682 C1

FIELD: electricity.

SUBSTANCE: field transistor manufacturing method includes creation of source and drain contacts, active area identification, application of a dielectric film onto the contact layer surface, formation of a submicron chink in the dielectric film for the needs of subsequent operations of contact layer etching and application of gate metal through the resistance mask; immediately after the dielectric film application one performs lithography for opening windows in the dielectric at least one edge whereof coincides with the Schottky gates location in the transistor being manufactured; after the window opening a second dielectric layer is applied onto the whole of the surface with the resistance removed; then, by way of repeated lithography, windows in the resistance are created, surrounding the chinks formed between the two dielectrics; selective etching of the contact layer is performed with metal films sprayed on to form the gates.

EFFECT: simplification of formation of under-gate chinks sized below 100 nm in the dielectric.

6 dwg

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RU 2 463 682 C1

Authors

Ajzenshtat Gennadij Isaakovich

Jushchenko Aleksej Jur'Evich

Ivashchenko Anna Ivanovna

Dates

2012-10-10Published

2011-01-24Filed