METHOD FOR PRODUCTION OF TUNNELLING MULTI-GATE FIELD NANOTRANSISTOR WITH SCHOTTKY CONTACTS Russian patent published in 2020 - IPC H01L21/338 B82B3/00 

FIELD: machine building.

SUBSTANCE: invention can be used in semiconductor technology for production of nanotransistors and VLSI. Invention discloses a method of making a tunnel field nanotransistor with Schottky contacts and several control electrodes of gates on a semiconductor substrate using an auxiliary dielectric-metal auxiliary layer (AL) deposited on a contact layer of the source/sink which has been deposited on the semiconductor substrate, in which the nanometer slit is formed, followed by formation on its walls and bottom of the first and third control electrodes, their spacers and the gate dielectric by successive deposition in the slit and plasma-chemical etching of the spacer and metal dielectric, and the second control electrode is formed by depositing a metal layer and its PCT into a narrowed by the total width of the first and third control electrodes and their spacers, wherein first a dielectric spacer and a gate insulator of the second control electrode are formed by depositing the dielectric on the side walls of the first and third control electrodes and the bottom of the slot in the aircraft. Simultaneously with control electrodes are formed by using a photoresist mask, an additional layer of metal and a method of dry etching contact pads of three control electrodes, and contact areas of source/drain are created after completion of technological operations of forming control electrodes.

EFFECT: technical result: electric alloying with the help of additional gates, which enables to create more sharp p-n junctions than in tunnelling transistors with physical doping; increased steepness of characteristics of tunnel transistors and reduction of their threshold voltage; possibility of changing type of channel conductivity for application of proposed transistors in CMOS technology of digital integrated circuits, simplification of technology of manufacturing of nanotransistors with nanosized gates, absence of technological operations associated with alloying, broader functional capabilities of nanotransistors, high steepness of the subthreshold characteristic owing to increasing the number of control electrodes and enabling operation in the tunnelling transistor mode.

14 cl, 10 dwg