FIELD: electricity.
SUBSTANCE: each bistable circuit, which forms a shift register, includes a thin-film transistor (T1) to increase potential of an output contact (49) on the basis of the first sync pulse, the area netA, connected to the contact of the gate of the film-thin transistor (T1), a thin-film transistor (T2) to reduce the potential of the area netA, and the area netB, connected to the contact of the gate of the thin-film transistor (T2). In this configuration the potential of the area netB increases on the basis of the third sync pulse, which advances the first sync pulse by phase by 90 degrees, and reduces on the basis of the fourth sync pulse, which lags behind the phase by 90 degrees relative to the first sync pulse.
EFFECT: suppression of excessive consumption of power due to leakage current in a thin-film transistor, in a case, when a circuit in a shift register is formed using a thin-fim transistor, which has a relatively high leakage in closed condition.
27 cl, 19 dwg
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