FIELD: information technology.
SUBSTANCE: information processing device has dynamic memory with more than one dynamic memory bank, an address buffer, a first address bus, a second address bus connected to the output of the address buffer and the address input of the dynamic memory, a central processing unit with an reboot control bus, cache memory with a cache memory configuration bus, a control circuit, a configuration register, a configuration analyser with a multiplexer control bus, address multiplexers with a multiplexer configuration bus.
EFFECT: high microprocessor efficiency when working with dynamic memory and simple process of debugging the microprocessor system.
3 cl, 1 dwg
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Authors
Dates
2013-04-27—Published
2011-12-08—Filed