FIELD: electricity.
SUBSTANCE: shift register contains cells, and each cell consists of three n-MOS transistors, two capacitors, two clock voltage buses, a zero potential bus and their links, at that in each cell there is an additional third bus of the clock voltage, the second switching n-MOS transistor and the load n-MOS transistor as well as their links.
EFFECT: provision of data shift reversibility inside the shift register.
2 dwg
| Title | Year | Author | Number |
|---|---|---|---|
| SHIFT REGISTER | 2013 |
|
RU2527188C1 |
| PUSH-PULL SHIFT REGISTER | 2014 |
|
RU2549136C1 |
| SHIFT REGISTER (VARIANTS) | 2013 |
|
RU2530271C1 |
| TWO-CYCLE DYNAMIC SHIFT REGISTER | 2014 |
|
RU2556437C1 |
| TWO-STAGE DYNAMIC SHIFT REGISTER | 2014 |
|
RU2542898C1 |
| SILICON MULTIPLEXER | 2015 |
|
RU2602373C1 |
| DYNAMIC SHIFT REGISTER | 2014 |
|
RU2542913C1 |
| SHIFT REGISTER BASED ON INSULATED-GATE FIELD-EFFECT TRANSISTORS | 0 |
|
SU1269210A1 |
| SHIFT REGISTER MEMORY CELL | 0 |
|
SU680055A2 |
| MEMORY REGISTER FOR SHIFT REGISTER | 0 |
|
SU1125655A1 |
