INTEGRATED CIRCUIT ON COMPLEMENTARY MOS TRANSISTORS Russian patent published in 1994 - IPC

FIELD: microelectronics. SUBSTANCE: integrated circuit includes semiconductor substrate in which two rows of parallel n-channel MOS transistors are arranged and two rows of p-channel MOS transistors are formed in parallel in pocket of n-type conductance. Each pair of rows includes common electrodes of gates in the form of current conducting tracks placed perpendicular to direction of common rows. Third rows of n-channel and p-channel MOS transistors positioned in parallel to proper pair of transistors with n-and p-channels are inserted in addition. In this case gates of first and second rows of transistors of each pair are at same time gates of added rows. Width of channels of transistors of added rows is equal at least to tripled width of channels of first and second rows of transistors of each pair. EFFECT: facilitated manufacture. 2 cl, 6 dwg