FIELD: computer engineering.
SUBSTANCE: invention relates to the field of computing and can be used in signal processing processors and general-purpose processors, devices for converting information, encoding and decoding data, and cryptography devices. Device contains N groups of external input data DG1, DG2, …, DGN with bit width W1, W2, …, WN, respectively, U bits of the external inputs of the task value of the number of shifts V0, V1, …, V(U-1) by the amount of shift groups from 0 to L, where U=[log2L]+1(smaller integer), (N+L) groups of external output data QG1, QG2, …, QG(N+L), U cascades of modules of elements from the 0th to (U-1), each i-th stage of which, where i=0, 1, …, (U-1), contains by (N+2i+1-1) modules of elements combined in three sections, (U+1) internal shear tires SB0, SB1, …, SBU with digit capacity of groups K (i, j), where j=1, 2, …, (N+2i+1-1) – the module number in the cascade, the first sections of the cascades consist of modules containing groups of 2AND gates with a second inverse input, the second sections of cascades consist of modules containing groups of 2AND gates with a second inverse input, 2AND gates and 2OR gates, and the third sections of cascades consist of modules containing groups of 2AND gates.
EFFECT: technical result is the ability to shift groups of binary data of different bit widths without losing the advanced discharges and reducing hardware costs.
1 cl, 1 dwg, 5 tbl
