TRIGGER SYNCHRONOUS R-S FLIP-FLOP Russian patent published in 2020 - IPC H03K17/16 

Abstract RU 2731438 C2

FIELD: digital circuitry; automatics; industrial electronics.

SUBSTANCE: six additional transistors and four additional resistors are introduced, the first additional transistor (n-p-n) is connected in series, first additional resistor and second additional transistor (n-p-n), in-series connected second additional resistor and third additional transistor (p-n-p), in-series connected fourth additional transistor (n-p-n) and third additional resistor, also in series connected fifth additional transistor (n-p-n) and fourth additional resistor, output of R-S flip-flop relative to "ground" (output Q) forms general output of collector of sixth additional transistor and second and fourth resistors.

EFFECT: simplification of trigger synchronous R-S flip-flop.

1 cl, 1 dwg, 1 tbl

Similar patents RU2731438C2

Title Year Author Number
TRIGGERED ASYNCHRONOUS RS FLIP-FLOP 2018
  • Peredelskij Gennadij Ivanovich
RU2693297C1
TRIGGER SYNCHRONOUS R-S TRIGGER 2018
  • Peredelskij Gennadij Ivanovich
RU2692041C1
TRIGGER TWO-STAGE RS FLIP-FLOP 2019
  • Peredelskij Gennadij Ivanovich
RU2721386C1
TRIGGERING ASYNCHRONOUS T FLIP-FLOP 2020
  • Peredelskij Gennadij Ivanovich
RU2726848C1
TRIGGER TWO-STAGE D TRIGGER 2019
  • Peredelskij Gennadij Ivanovich
RU2714106C1
TRIGGER GATE AND-NOT/OR-NOT 2022
  • Peredelskii Gennadii Ivanovich
RU2783403C1
TRIGGER SYNCHRONOUS D FLIP-FLOP 2018
  • Peredelskij Gennadij Ivanovich
RU2692422C1
TRIGGERING AND/NAND LOGIC ELEMENT 2020
  • Peredelskij Gennadij Ivanovich
RU2727613C1
TRIGGER LOGIC GATE AND/OR 2020
  • Peredelskij Gennadij Ivanovich
RU2745398C1
TRIGGER ADDER MODULO TWO 2018
  • Peredelskij Gennadij Ivanovich
RU2700195C1

RU 2 731 438 C2

Authors

Peredelskij Gennadij Ivanovich

Dates

2020-09-02Published

2018-10-16Filed